1. Field of the Invention
The present invention relates to a compound logic circuit which is composed of a NAND gate circuit and a NOR gate circuit.
2. Description of the Related Art
For example, consider a compound logic circuit formed on one integrated circuit chip. In case the compound logic circuit is composed of a NAND gate circuit and a NOR gate circuit both of which is formed of CMOS transistors, in general, the NAND gate circuit is formed of quite different transistors from the NOR gate circuit.
FIG. 2 is a circuit diagram showing this type of compound logic circuit composed of a NAND gate circuit and a NOR gate circuit according to the related art of the invention.
As shown in the upper part of FIG. 2, one NAND gate circuit 10 is composed of four transistors 11 to 14, that is, two p-channel MOS transistors 11, 12 (referred to as a PMOS transistor) and two n-channel MOS transistors 13, 14 (referred to as a NMOS transistor).
AS shown in the lower part of FIG. 2, one NOR gate circuit 20 is also composed of four transistors 21 to 24, that is, two PMOS transistors 21, 22 and two NMOS transistors 23, 24.
As will be obvious from FIG. 2, the NAND gate circuit 10 is composed of the dedicated transistors which are independent of the transistors composing the NOR gate circuit 20.
This type of compound logic circuit according to the related art of the invention requires each two PMOS transistors and each two NMOS transistors, that is, eight transistors in total for composing one NAND gate circuit and one NOR gate circuit. It means that the type of compound logic circuit needs a larger area on the integrated circuit chip occupied by the compound logic circuit.